Universiteit Leiden

nl en

Bart Kienhuis

Universitair docent / gast

Naam
Dr.ir. A.C.J. Kienhuis
Telefoon
+31 71 527 5776
E-mail
a.c.j.kienhuis@liacs.leidenuniv.nl

Bart Kienhuis received a MSEE from Delft University of Technology in 1994 and he received his Ph.D. from Delft University of Technology in 1999. During his Ph.D., he has worked at Philips Research in Eindhoven on a design methodology (the Y-chart approach) for high performance video architectures for consumer products. His primary interest is in the area of embedded system design with an emphasis on design space exploration, performance modeling, architectural analysis, and hardware/software codesign. From 1999 until 2000, Bart Kienhuis was a Post Doc  in the group of Prof. Edward A. Lee at the University of California at Berkeley. He is an assistant professor in the Computer Systems group. Bart is a Senior Member of the IEEE.

Universitair docent / gast

  • Wiskunde en Natuurwetenschappen
  • Leiden Inst Advanced Computer Sciences

Werkadres

Snellius
Niels Bohrweg 1
2333 CA Leiden
Kamernummer 126

Contact

  • Teijlingen W. van, Galuzzi C., Leuken R. van & Kienhuis B. (2016), Determining Performance Boundaries on High-Level System Specifications. In: Stuijk S. (red.) SCOPES'16 Proceedings of the 19th International Workshop on Software and Compilers for Embedded Systems. New York, U.S.A.: ACM. 90-97.congresbijdrage (refereed)
  • Shoshkov T., Stefanov T. & Kienhuis B. (2016), Parameterized System Level Design: Real-Time X-Ray Image Processing Case Study. In: 2016 IEEE 27th International Conference on Application-specific Systems, Architectures and Processors (ASAP).: IEEE. 196-201.congresbijdrage (refereed)
  • Shoshkov T.P., Stefanov T.P. & Kienhuis A.C.J. (2016), Parameterized System Level Design : Real-Time X-Ray Image Processing Case Study. In: Proceedings of the 2016 IEEE 27th International Conference on Application-specific Systems, Architectures and Processors (ASAP). Red Hook: Institute of Electronic and Electrical Engineers.congresbijdrage (refereed)
  • Lavagno L., Lazarescu M.T., Papaefstathiou I., Brokalakis A., Walters J., Kienhuis A.C.J. & Schäfer F. (2013), HEAP: A Highly Efficient Adaptive multi-Processor framework, International Journal on Microprocessors and Microsystems: Embedded Hardware Design 37(8-C): 1050-1062.artikel in tijdschrift (refereed)
  • Haastregt S. van & Kienhuis A.C.J. (2012), Enabling Automatic Pipeline Utilization Improvement in Polyhedral Process Network Implementations. In: Intl. Conference on Application-specific Systems, Architectures and Processors (ASAP'12). 173-176.congresbijdrage (refereed)
  • Balevic A. & Kienhuis A.C.J. (2012), Scaling Data-Intensive Applications on Heterogeneous Platforms with Accelerators. In: Proceedings IPDPS Workshops 2012: IEEE Computer Society. 1866-1873.congresbijdrage (refereed)
  • Lavagno L., Lazarescu M.T., Papaefstathiou I., Brokalakis A., Walters J., Kienhuis A.C.J. & Schäfer F. (2012), HEAP: A Highly Efficient Adaptive Multi-processor Framework. In: Proceedings Euromicro Conference on Digital System Design (DSD 2012): IEEE. 509-516.congresbijdrage (refereed)
  • Nane Razvan, Haastregt S. van, Stefanov T.P., Kienhuis A.C.J., Sima Vlad Mihai & Bertels K. (2011), IP-XACT Extensions for Reconfigurable Computing. In: Proceedings 22nd IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP'11). 215-218.congresbijdrage (refereed)
  • Haastregt S. van & Kienhuis A.C.J. (2011), High Level Synthesis for FPGAs Applied to a Sphere Decoder Channel Preprocessor. In: ICT.OPEN Conference (PROGRESS).congresbijdrage (refereed)
  • Nane Razvan, Haastregt S. van, Stefanov T.P., Kienhuis A.C.J. & Bertels K. (2011), An HdS Meta-Model Case Study: Integrating Orthogonal Computation Models. In: Proceedings Hardware Dependent Software Solutions for SoC Design (DATE 2011) Special Interest Workshop W7.congresbijdrage (refereed)
  • Haastregt S. van, Neuendorffer S., Vissers K. & Kienhuis A.C.J. (2011), High Level Synthesis for FPGAs Applied to a Sphere Decoder Channel Preprocessor. In: Proceedings International Symposium on Field Programmable Gate Arrays (FPGA'11). 278-278.congresbijdrage (refereed)
  • Balevic A. & Kienhuis A.C.J. (2011), An Efficient Stream Buffer Mechanism for Dataflow Execution on Heterogeneous Platforms with GPUs. In: Proceedings of Data-Flow Execution Models for Extreme Scale Computing (DFM 2011).congresbijdrage (refereed)
  • Balevic A. & Kienhuis A.C.J. (2011), A Data Parallel View on Polyhedral Process Networks. In: Proceedings of 14th International Workshop on Software and Compilers for Embedded Systems (SCOPES'11). 38-74.congresbijdrage (refereed)
  • Balevic A. & Kienhuis A.C.J. (2011), KPN2GPU: An Approach for Discovery and Exploitation of Fine-Grain Data Parallelism in Process Networks, SIGARCH Computer Architecture News 39(4): 66-72.artikel in tijdschrift (refereed)
  • Balevic A. & Kienhuis A.C.J. (2011), Exploiting Task Parallel Execution on CUDA: A Case Study. In: Proceedings of the 2nd Workshop on Applications for Multi and Many Core Processors.congresbijdrage (refereed)
  • Haastregt S. van, Halm E. & Kienhuis A.C.J. (2010), Cost Modeling and Cycle-Accurate Co-Simulation of Heterogeneous Multiprocessor Systems. In: Proc. of the Conference on Design, Automation and Test in Europe (DATE'10). 1297-1300.congresbijdrage (refereed)
  • Leupers R., Thiele L., Nie X., Kienhuis A.C.J., Weiss M. & Isshiki T. (2010), Cool MPSoC programming. In: Design, Automation and Test in Europe, DATE 2010: IEEE. 1488-1493.congresbijdrage (refereed)
  • Haastregt S. van & Kienhuis A.C.J. (2009), Automated Synthesis of Streaming C Applications to Process Networks in Hardware. In: Proc. of the Conference on Design, Automation and Test in Europe: IEEE. 890-893.congresbijdrage (refereed)
  • Derrien S., Turjan A., Zissulescu C., Kienhuis A.C.J. & Deprettere E.F.A. (2008), Deriving efficient controlin Process Networks with Compaan/Laura, International Journal of Embedded Systems 3(3): 170-180.artikel in tijdschrift (refereed)
  • Jiang B., Deprettere E.F.A. & Kienhuis A.C.J. (2008), Hierarchical Run Time Deadlock Detection in Process Networks. In: Proceedings of the IEEE workshop on Signal Processing Systems. 239-244.congresbijdrage (refereed)
  • Ko M.-Y., Zissulescu C., Puthenpurayil N., Bhattacharrya S.S., Kienhuis A.C.J. & Deprettere E.F.A. (2007), Parameterized Looped Schedules for Compact Representation of Execution Sequences in DSP Hardware and Software Implementation, IEEE Transactions on Signal Processing 55(6): 3126-3138.artikel in tijdschrift (refereed)
  • Meijer S., Kienhuis A.C.J., Turjan A. & Kock E. de (2007), Interactive presentation: A process splitting transformation for Kahn process networks. In: DATE '07: Proceedings of the conference on Design, automation and test in Europe. San Jose: EDA Consortium. 1355-1360.congresbijdrage (refereed)
  • Meijer S., Kienhuis A.C.J. & Walters J. (2007), Automatic partitioning and mapping of stream-based applications onto the Intel IXP Network processor. In: SCOPES '07: Proceedingsof the 10th international workshop on Software compilers for embedded systems. New York: ACM. 23-30.congresbijdrage (refereed)
  • Ko M., Zissulescu C., Puthenpurayil S., Bhattacharyya S.S., Kienhuis A.C.J. & Deprettere E.F.A. (2006), Parameterized Looped Schedules for Compact Representation of Execution Sequences. In: Proceedings of the International Conference on Application Specific Systems, Architectures, and Processors. 223-230.congresbijdrage (refereed)
  • Turjan A., Kienhuis A.C.J. & Deprettere E.F.A. (2005), Solving Out-of-Order Communication in Kahn Process Networks, Journal of VLSI Signal Processing 40(1): 7-18.artikel in tijdschrift (refereed)
  • Zissulescu C., Kienhuis A.C.J. & Deprettere E.F.A. (2005), Expression Synthesis in Process Networks generated by LAURA. In: Proceedings IEEE 16th International Conference on Application-specific Systems, Architectures and Processors (ASAP 2005): IEEE Computer Society. 15-21.congresbijdrage (refereed)
  • Zissulescu C., Kienhuis A.C.J. & Deprettere E.F.A. (2005), Communication Synthesis in a multiprocessor environment. In: Proceedings of the 15th International Conference on Field Programmable Logic and Applications (FPL 2005). 360-365.congresbijdrage (refereed)

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